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V.V.Nandini

Sravan K. Vittapu

Ravi Chand Sankuru

S.Sai Aashrith

M.Maniteja

T.Krishna Prasad Reddy

Abstract

This paper discovers a PLL core design that can achieve wide range of frequency. As we know that the main block of PLL is voltage control oscillator (VCO). For achievement of high oscillation frequency, good stability, a ring oscillator that uses current starving technique has been designed. Based on the circuit the PLL is designed using Cadence tool in 45 nm technology.

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